1. Field of the Invention
The present invention relates to a voltage multiplier circuit and, more particularly, to a voltage multiplier circuit built in a semiconductor integrated circuit for a motor driver circuit of a floppy disk drive (FDD) or hard disk drive (HDD) comprising an H-bridge circuit composed of four N-channel field effect transistors as an output stage and further utilizing the separate power supplies for control and for the output stage.
2. Description of the Related Art
An example of the aforementioned semiconductor device for a motor driver circuit is disclosed in an article entitled "SMARTPOWER MOTOR DRIVER FOR LOW VOLTAGE APPLICATIONS", by D. Cave et al., IEEE 1987 CUSTOM INTEGRATED CIRCUITS CONFERENCE, pp. 276-279. The voltage multiplier circuit built in semiconductor device in prior art is composed of a combination of diodes, capacitors and an oscillator, as is shown in FIG. 1. Referring to FIG. 1, the output of an oscillator circuit 10 driven by a power supply line 9 is applied through a serial circuit composed of an inverter 3 and diodes 7, 8 and 18 to the gate of an N-channel transistor (not shown) in an output circuit 12 and also to one of the electrodes of a capacitor 6, the other electrode of which is grounded. By connecting a capacitor 4 between input of the inverter 3 and the connection point (a) of the diodes 7 and 8, and also a capacitor 5 between output of the inverter 3 and the connection point (b) of the diodes 8 and 18, the multiplied voltage is obtained at the connection point (c) of the diode 18 and the capacitor 6.
An example of the oscillator circuit 10 in FIG. 1 is shown in FIG. 2(a), where the inverters 19, 20 and 21 are connected in series, and moreover a resistor 23 is connected between input and output of the inverter 19, and a capacitor 22 is connected between input of the inverter 19 and output of the inverter 20.
Now, the operation of the circuit shown in FIG. 1 will be explained. Referring again to FIG. 1, a rectangular wave shown in FIG. 2(b) is generated by the oscillator 10 and is phase-inverted by the inverter 3. The diodes 7, 8 and 18 prevent the inverse flow of electric current. Initially, the voltage at the connection point (a) between diodes 7 and 8 becomes equal to voltage of the power supply line 9 (normally 5 volts), so that the capacitors 4 and 5 are pre-charged to 5 volts. When the output of the oscillator 10 becomes 5 volts, the voltage at point (a) is raised to 10 volts. Consequently, the voltage at point (b) also becomes 10 volts. According to the same principle, when the output of the inverter 3 becomes 5 volts, the voltage at point (b) is raised to 15 volts, that is, the voltage at point (c) becomes 15 volts.
The defects of the circuit of prior art mentioned above is that the time taken to build up the voltage at point (c) is long, because the charging of the capacitor 6 begins after the oscillator starts to operate and that the gate electrode of the output MOS transistor may be broken due to the spike noise generated at the signal switching instant, because the voltage three times as high as power supply voltage is applied to it.